An active pixel sensor ("APS") is a special kind of light sensing device. Each active pixel includes a light sensing element and one or more active transistors within the pixel itself. The active transistors amplify and buffer the signals generated by the light sensing elements in the pixels. One type of such APS devices is disclosed in U.S. Pat. No. 5,471,515 by Fossum et al., the disclosure of which is incorporated herein by reference.
APS devices represent an emerging technology in a wide range of imaging applications. APS has a number of significant advantages in comparison with the well-developed and widely used charge coupled devices (CCDs) and other imaging technologies including photodiode arrays, charge injection devices and hybrid focal plane arrays.
CCD devices have a number of advantages because they are an incumbent technology, they are capable of large formats and very small pixel size and they facilitate noiseless charge domain processing techniques (such as binning and time delay integration). However, CCD imagers suffer from a number of disadvantages. For example, CCD imagers operates with destructive signal read-out and their signal fidelity decreases as the charge transfer efficiency raised to the power of the number of stages. The latter requires a CCD imager to have a nearly perfect charge transfer efficiency. CCD devices are also particularly susceptible to radiation damage and usually require carefully-designed light shielding to avoid smear. Furthermore, CCD imagers usually have high power dissipation for large arrays and limited spectral responsivity range.
In order to ameliorate the charge transfer inefficiency problem, CCD imagers are fabricated with a specialized CCD semiconductor fabrication process to maximize their charge transfer efficiency. One limitation is that the standard CCD process is incompatible with complementary metal oxide semiconductor (CMOS) process, while the image signal processing electronics required for the imager are best fabricated in CMOS. Accordingly, it is impractical to integrate on-chip signal processing electronics in a CCD imager. Thus, the signal processing electronics is off-chip. Typically, each column of CCD pixels is transferred to a corresponding cell of a serial output register, whose output is amplified by a single on-chip amplifier (e.g., a source follower transistor) before being processed in off-chip signal processing electronics. As a result, the read-out frame rate is limited by the rate at which the on-chip amplifier can handle charge packets divided by the number of pixels in the imager.
The other types of imager devices have problems as well. For example, photodiode arrays usually exhibit high noise due to so-called kTC noise which makes it very difficult to reset a diode or capacitor node to the same initial voltage at the beginning of each integration period. Photodiode array, also suffer from lag. Charge injection devices usually exhibit high noise, but enjoy the advantage of non-destructive readout over CCD devices. Hybrid focal plane arrays exhibit low noise but are prohibitively expensive for many applications and have relatively small array sizes (e.g., 512-by-512 pixels).
In contrast, an APS device receives and processes input signals with the active pixel itself, thus eliminating the charge transfer over distances that are inherent in CCDs. Consequently, many drawbacks associated with CCDs are avoided in APS devices. For example, the performance of APS devices can be maintained as the array size increases. The APS readout rate is usually higher than that of CCDs. Since CMOS circuitry is often associated with the image sensor, the power consumption can be significantly reduced. APS devices are inherently compatible with CMOS processes, allowing reduced cost of manufacturing. Many on-chip operations and controls can be relatively easily implemented including timing and analog-to-digital conversion. APS devices are also less vulnerable to radiation damage and can be designed for non-destructive readout. Moreover, the active pixels of APS devices allow random access and on-chip signal processing.
The invention is embodied in an imaging device formed as a monolithic CMOS integrated circuit in an industry standard CMOS process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.
In a preferred embodiment, the sensing node of the charge coupled device stage includes a floating diffusion, and the charge coupled device stage includes a transfer gate overlying the substrate between the floating diffusion and the photogate. This preferred embodiment can further include apparatus, for periodically resetting a potential of the sensing node to a predetermined potential, including a drain diffusion connected to a drain bias voltage and a reset gate between the floating diffusion and the drain diffusion, the reset gate connected to a reset control signal.
Preferably, the output transistor is a field effect source follower transistor, the floating diffusion being connected to a gate of the source follower transistor. Preferably, the readout circuit further includes a double correlated sampling circuit having an input node connected to the output transistor. In the preferred implementation, the double correlated sampling circuit samples the floating diffusion immediately after it has been reset at one capacitor and then, later, at the end of the integration period at another capacitor. The difference between the two capacitors is the signal output. In accordance with a further refinement, this difference is corrected for fixed pattern noise by subtracting another calibration signal which is a difference sensed between the two capacitors while they are temporarily shorted.
One aspect of the present invention is an implementation of color filtering. Color filters such as polymer filters are preferably integrated with an APS sensor for color separation. Alternatively, a plurality of APS sensors each having a color filter for a different color may to used to achieve maximum imaging resolution.